Some processors employ a northbridge to facilitate communication between one or more processor cores, memory, southbridges, and other input/output components. The processors generate communication traffic in the form of memory access requests that retrieve data from and store data at the memory. The northbridge is interposed between the memory and the processor cores, and manages the communication traffic to prevent collisions and other potential traffic hazards. Offloading the management of the communication traffic to the northbridge reduces overhead at the processor cores, increasing processing efficiency. However, the resources of the northbridge can be taxed by some communication traffic patterns, such as bursts of memory access requests from a single processing core, thereby reducing overall memory access throughput.
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